The capability list here at H C D is expanding all the time, the latest is the introduction of state of the art BGA Rework and inspection equipment:Developer of Circuit Creator design software, a low cost CAE system which provides schematic design and capture, circuit simulator, interactive symbol editor, printed circuit board design and layout, and automatic routing.
Autom8 - Software engineers offering consultancy, bespoke engineering and automation solutions, for designers/fabricators/assemblers of printed circuit boards.
Baumeister Mediasoft Engineering - Bartels AutoEngineer CAE/CAD/CAM PCB design system. Featuring schematic editor, PCB layout, autoplacement, neural autorouter, CAM processor and CAM viewer.
DipTrace - Complete PCB Design Solution featuring Schematic, PCB, autorouter, component and pattern editors. Standard libraries include 40.000+ components.
The Electronics Manufacturing Page - A guide to industry resources on the World Wide Web. Includes EDA, PCB manufacture and assembly.
Electronics Workbench - Industry standard design/simulation software. Products include Multisim, Ultiboard, Ultiroute, CommSim. Software solutions for PLDs, SPICE simulation, FPGA/CPLD synthesis, design analysis, PCB layout and autorouting are available.
ExpressPCB - Rapid prototyping house which provides free board layout software for use with their service. Software suits Windows 95/98/ME/200/NT/XP Stockit Version 1.5 Update
Available as a low cost upgrade to existing users, Stockit Version 1.5 brings you further advances in the production management process.
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Find out more...specifically for electronics, and concentrates on EDA used for designing integrated circuits. The segment of the industry that must use EDA are chip designers at semiconductor companies. Large chips are too complex to design by hand.

[edit] Growth of EDA
EDA for electronics has rapidly increased in importance with the continuous scaling of semiconductor technology. (See Moore's Law.) Some users are foundry operators, who operate the semiconductor fabrication facilities, or "fabs", and design-service companies who use EDA software to evaluate an incoming design for manufacturing readiness. EDA tools are also used for programming design functionality into FPGAs.

[edit] History
Before EDA, integrated circuits were designed by hand, and manually laid out. Some advanced shops used geometric software to generate the tapes for the Gerber photoplotter, but even those copied digital recordings of mechanically-drawn components. The process was fundamentally graphic, with the translation from electronics to graphics done manually. The best known company from this era was Calma, whose GDSII format survives.

By the mid-70s, developers were starting to automate the design, and not just the drafting. The first placement and routing (Place and route) tools were developed. The proceedings of the Design Automation Conference cover much of this era.

The next era began more or less with the publication of "Introduction to VLSI Systems" by Carver Mead and Lynn Conway in 1980. This groundbreaking text advocated chip design with programming languages that compiled to silicon. The immediate result was a hundredfold increase in the complexity of the chips that could be designed, with improved access to design verification tools that used logic simulation. Often the chips were not just easier to lay out, but more correct as well, because their designs could be simulated more thoroughly before construction.

The earliest EDA tools were produced academically, and were in the public domain. One of the most famous was the "Berkeley VLSI Tools Tarball", a set of UNIX utilities used to design early VLSI systems. Still widely used is the Espresso heuristic logic minimizer and Magic.

Another crucial development was the formation of MOSIS, a consortium of universities and fabricators that developed an inexpensive way to train student chip designers by producing real integrated circuits. The basic idea was to use reliable, low-cost, relatively low-technology IC processes, and pack a large number of projects per wafer, with just a few copies of each projects' chips. Cooperating fabricators either donated the processed wafers, or sold them at cost, seeing the program as helpful to their own long-term growth.

1981 marks the beginning of EDA as an industry. For many years, the larger electronic companies, such as Hewlett Packard, Tektronix, and Intel, had pursued EDA internally. In 1981, managers and developers spun out of these companies to concentrate on EDA as a business. Daisy Systems, Mentor Graphics, and Valid Logic Systems were all founded around this time, and collectively referred to as DMV. Within a few years there were many companies specializing in EDA, each with a slightly different emphasis.

In 1986, Verilog, a popular high-level design language, was first introduced as a hardware description language by Gateway. In 1987, the U.S. Department of Defense funded creation of VHDL as a specification language. Simulators quickly followed these introductions, permitting direct simulation of chip designs: executable specifications. In a few more years, back-ends were developed to perform logic synthesis.

Many of the EDA companies acquire small companies with software or other technology that can be adapted to their core business. Most of the market leaders are rather incestuous amalgamations of many smaller companies. This trend is helped by the tendency of software companies to design tools as accessories that fit naturally into a larger vendor's suite of programs (the "tool flow").

While early EDA focused on digital circuitry, many new tools incorporate analog design, and mixed systems. This is happening because there is now a trend to place entire electronic systems on a single chip.

Current digital flows are extremely modular (see Integrated circuit design, Design closure, and Design flow (EDA)). The front ends produce standardized design descriptions that compile into invocations of "cells,", without regard to the cell technology. Cells implement logic or other electronic functions using a particular integrated circuit technology. Fabricators generally provide libraries of components for their production processes, with simulation models that fit standard simulation tools. Analog EDA tools are much less modular, since many more functions are required, they interact more strongly, and the components are (in general) less ideal.

[edit] Product areas
EDA is divided into many (sometimes overlapping) sub-areas. They mostly align with the path of manufacturing from design to mask generation. The following applies to chip/ASIC/FPGA construction but is very similar in character to the areas of printed circuit board design:

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Design and Architecture: design the chip's schematics, output in Verilog, VHDL, SPICE and other formats.
Floorplanning: The preparation step of creating a basic die-map showing the expected locations for logic gates, power & ground planes, I/O pads, and hard macros. (This is analogous to a city-planner's activity in creating residential, commercial, and industrial zones within a city block.)
Logic synthesis: translation of a chip's abstract, logical RTL-description (often specified via a hardware description language, or "HDL", such as Verilog or VHDL) into a discrete netlist of logic-gate (boolean-logic) primitives.
Behavioral Synthesis, High Level Synthesis or Algorithmic Synthesis: This takes the level of abstraction higher and allows automation of the architecture exploration process. It involves the process of translating an abstract behavioral description of a design to synthesizeable RTL. The input specification is in languages like behavioral VHDL, algorithmic SystemC, C++ etc and the RTL description in VHDL/Verilog is produced as the result of synthesis.
IP cores: provide pre-programmed design elements.
EDA databases: databases specialized for EDA applications. Needed since historically general purpose DBs did not provide enough performance.
Simulation: simulate a circuit's operation so as to verify correctness and performance.
Transistor Simulation – low-level transistor-simulation of a schematic/layout's behavior, accurate at device-level.
Logic simulation – digital-simulation of an RTL or gate-netlist's digital (boolean 0/1) behavior, accurate at boolean-level.
Behavioral Simulation – high-level simulation of a design's architectural operation, accurate at cycle-level or interface-level.
Hardware emulation – Use of special purpose hardware to emulate the logic of a proposed design. Can sometimes be plugged into a system in place of a yet-to-be-built chip; this is called in-circuit emulation.
Clock Domain Crossing Verification (CDC check): Similar to linting, but these checks/tools specialize in detecting and reporting potential issues like data loss, meta-stability due to use of multiple clock domains in the design.
Formal verification, also model checking: Attempts to prove, by mathematical methods, that the system has certain desired properties, and that certain undesired effects (such as deadlock) cannot occur.
Equivalence checking: algorithmic comparison between a chip's RTL-description and synthesized gate-netlist, to ensure functional equivalency at the logical level.
Power analysis and optimization: optimizes the circuit to reduce the power required for operation, without affecting the functionality.
Place and route, PAR: (for digital devices) tool-automated placement of logic-gates and other technology-mapped components of the synthesized gate-netlist, then subsequent routing of the design, which adds wires to connect the components' signal and power terminals.
Static timing analysis: Analysis of the timing of a circuit in an input-independent manner, hence finding a worst case over all possible inputs.
Transistor layout: (for analog/mixed-signal devices), sometimes called polygon pushing – a prepared-schematic is converted into a layout-map showing all layers of the device.
Design for Manufacturability: tools to help optimize a design to make it as easy and cheap as possible to manufacture.
Design closure: IC design has many constraints, and fixing one problem often makes another worse. Design closure is the process of converging to a design that satisfies all constraints simultaneously.
Analysis of substrate coupling.
Power network design and analysis

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GraphiCode, Inc. - Creators of GC- Series CAM software for PCB manufacturers. Range includes GC-Powerplace, GC Powerstation. GC-CAMEdit and GC-Prevue, a free gerber viewer.
HyperLynx - Pre- and Post-layout signal integrity, crosstalk and EMC software for high speed PCB design.
Illuminated Software - Developer of Draftcad Deluxe, schematic capture and printed circuit board layout software for Linux, DOS and Windows.
KGS Technology Ltd - Distributor of various third party CAD software products, and PCB engineering service provider.
Microcad - Makers of Qcad, a complete schematic through PCB design software package together with an autorouter and a post routing optimizer.
Mindlink Technologies - Providing PCB Design and related CAD services including custom VB programming, for linking CAD systems to other OLE applications.
OrCAD - EDA software and services for component information management, designing field-programmable gate arrays, programmable logic devices, analog or mixed analog-digital circuits and printed circuit boards.
Pad2Pad... - Custom printed circuit boards with components, user specifies design completely via the Internet. Service includes free software for PCB design and online quote generation.
PADS - Design software including schematic capture, board layout and signal integrity packages.

· PCB Design
· Fast turnaround bare board manufacture
· Component Procurement
· Assembly
· BGA Inspection and Rework
· Final Assembly – Box Build